Integrated circuits and packaged electronic components (e.g., microelectronic devices) are often produced from a semiconductor-based die or chip with one or more electronic components. A variety of integrated packaging types are available, including flip-chip ball grid array (FC-BGA) direct surface mountable packages. FC-BGA include a die mounted to a substrate, such as a printed circuit board (PCB), which in turn has conductive pads or balls for soldering to a user board. Wafer chip scale packaging or wafer level chip scale packaging (WCSP or WLCSP) technology is employed in manufacturing flip-chip BGA devices. In one WCSP process, lithographic steps are performed on a wafer or die to spin coat, expose, develop, and etch a repassivation layer with patterned openings at locations for formation of copper pillar contact structures and subsequent solder ball drop or placement prior to surface mount soldering of the die to a carrier substrate. The repassivation material protects the copper and passivates the copper surface, and mechanically strengthens the base of the copper pillar during assembly to the carrier substrate. Further lithographic processing is required where redistribution layers (RDLs) are included in the die, and each repassivation layer adds an extra mask to the total cost of the process. Also, redistribution layer shorting can result from copper migration between redistribution layer features and ball placement locations.